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Articles, Columns, Interviews, and White Papers for DSP, FPGA, and Programmable Logic Design

Latest ADCs will cut IF sampling down to nanoseconds
By Rob Hoyecki (Curtiss-Wright Controls Embedded Computing)
Why receiver systems are poised for noticeable upticks in range, sensitivity, and selectivity.
Chip shipments on the upswing
By Will Strauss (Forward Concepts)
What was top of mind for Will following CES?
Compressing ADCs defuses data rate explosion in Data Acquisition Systems
By Daniel Kreindler (Samplify)
If there were a DAS Olympics, algorithms competing in the "Compression for Medical/Wireless" event would be among the fastest.
Joint FPGA-DSP grab, squeeze, and send effort sees video compression success
By Tim Klassen (GE Intelligent Platforms)
Adding an FPGA to a team that includes a hybrid DSP device with a general-purpose CPU and DSP engine makes for a productive take on interfacing with numerous dissimilar video standards, compressing them to a common standard, and transmitting the result over an Ethernet link.
01DC-HSPA+, MediaTek's rise, and training wheels
By Will Strauss (Forward Concepts)
Will examines several reasons MediaTek looks to be more of a contender as 2010 Q1 begins.
Taming Software-Defined Radio: A graphical user interface for digital communication system prototyping
By Michael J. Leferman (Worcester Polytechnic Institute (WPI)) and Alexander M. Wyglinski (Worcester Polytechnic Institute (WPI))
Dream Stream: Getting around what would have been an arduous learning curve by using Simulink for streaming access to the Universal Software Radio Peripheral 2 (USRP2)
For floating-point processing, new choice arrives with the new decade
By Rob Hoyecki (Curtiss-Wright Controls Embedded Computing)
Rob outlines several reasons developers addressing COTS military signal processing have reason to consider the Intel Core i7 micro-architecture.
OpenVPX and high-speed interconnects usher in a new era of highly scalable DSP systems
By Rob Hoyecki (Curtiss-Wright Controls Embedded Computing)
Hinderances to building large-scale DSP systems are falling by the wayside.
Intel tries DSP again...using a "soft" approach
By Chris A. Ciufo, Editor
Software is key to Intel's DSP plans.
Q4 sees buys, mergers, and a niche player worth watching
By Will Strauss (Forward Concepts)
Insights from Will on the cell phone chip market. lossless signal compression, and more
Unraveling debug and design verification snags
By Paul Bradley (DAFCA)
Growing FPGA complexity need not equal a corresponding growth in costs or time to market.
Performance, flexibility, and efficiency make the case for market-specific DSPs
By Eran Briman (CEVA)
4G wireless communications processing and HD video/audio processing are among the challenges market-specific DSPs are gearing up to handle.
Tackling Linux size, modularity, and GPL issues
By Kim Rowe (Rowebots)
Kim outlines options for developers facing proprietary kernels and OSs that can substantially limit future architectural choices, driving up costs and reducing profits.
Portrait of a power miser: Open-architecture DSP core teams with a number-crunching accelerator for audio apps
By David Coode (ON Semiconductor)
Embedded DSP-based solutions are stepping to the plate for a squeeze play. Digital audio processing solutions must fit into less space and consume less power than ever.
Why 3U VPX has an edge over CompactPCI for FPGA/DSP military applications
By Rob Hoyecki (Curtiss-Wright Controls Embedded Computing)
Making the case for a form factor that the mil-aero COTS community can rely on for high-speed fabric support
White Paper: Using the NAG Toolbox for MATLABĀ®
Numerical Algorithms Group
The Numerical Algorithms Group (NAG) developed the first mathematical software library, now the largest commercially available collection of mathematical and statistical algorithms. Here you will find demonstrated how to call some popular NAG routines and how to use MATLAB's plotting facilities to view the results.
White Paper: ISE Design Suite 11.1: Creating the First User-Specific FPGA Design Environments
By Mark Goosman (Xilinx, Inc.)
Taking on the designer productivity, time to market, and results quality trifecta
Everything you ever wanted to know about the cellular chip market - 2009
By Will Strauss (Forward Concepts)
This article details market forecasts for virtually all cell phone integrated circuits, including digital basebands, RF transceivers and PAs, ap... (continues)
Cell phones: The next great software driver
By Chris Ciufo (Editor)
Operating system companies targeting cell phones and mobile internet devices provide software that'll drive the greater embedded market.
Quantifying the cost savings of using open source in software development
By Eran Strod (Black Duck Software)
Managing open source software
FMC modules deliver high-speed I/O from ADCs to FPGAs
By Mark Littlefield (Curtiss-Wright Controls Embedded Computing)
Overcoming the difficulty of designing an FPGA with I/O that suits a variety of applications.
Samsung rolls out fastest Cortex-A8 chip
By Will Strauss (Forward Concepts)
Could it be a contender? Will thinks yes with regard to Samsung's beefier 45nm low-leakage CMOS edition of its ARM Cortex-A8 implementation.
White Paper: Xilinx Tailors Four Tool Flows to Customer Design Disciplines in ISE Design Suite 11.1
By Michael Santarini (Xilinx, Inc.)
Different strokes for different folks: What to expect regarding the versatility of new tool flow solutions.
15Advanced power management: The next step in DSP board design
By Rob Hoyecki (Curtiss-Wright Controls Embedded Computing)
Filling an information gap when it comes to power use
01White Paper: Using FPGAs to Render Graphics and Drive LCD Interfaces
By Stefano Zammattio (Altera Corporation)
Using FPGAs to add a LCD and GUI display to any embedded system.

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