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EDA tools → June 2010 System design needs to rise above ìC-levelîOne approach to catching integration problems and design flaws at an earlier stage → June 2010 Rugged FPGA I/O team likely to draft XMC/FMCReal estate broker? How FMCs free up real estate for more I/O.Market projections → June 2010 Snapdragons, sapphires, and starting (again) in the cell phone businessWill touches on a number of topics, including what it will take to make headway in the 4G handset market.GPGPU → June 2010 Manycore processors can replace FPGAsLatency and scalability are among the criteria to consider when weighing FPGA versus manycore processor useOpenVPX → April 2010 OpenVPX systems speed the move to all-digital RADARIt's a match: An architecture that's scalable (OpenVPX) takes on the systolic-to-fully-parallel digital beamformer scaling challenge military system integrators face.Market Research → April 2010 CTIA observationsThoughts from CTIA and word of a novel 3D PLD architectureMarket issues → February 2010 Chip shipments on the upswingWhat was top of mind for Will following CES?Critical systems → February 2010 Latest ADCs will cut IF sampling down to nanosecondsWhy receiver systems are poised for noticeable upticks in range, sensitivity, and selectivity.Data acquisition → February 2010 Compressing ADCs defuses data rate explosion in Data Acquisition SystemsIf there were a DAS Olympics, algorithms competing in the "Compression for Medical/Wireless" event would be among the fastest.Algorithms → February 2010 White Paper: Synthesizing Algorithms from MATLAB and Model-based DescriptionsAlgorithm design is one of the most significant factors in the increasing complexity of IC design and verification. Algorithm, signal processing, and system engineers have increasingly been using MATLAB and Simulink for very concise modeling and design of their algorithms. This paper introduces Synopsys' Synphony High Level Synthesis (HLS) product which allows designers to take algorithm concepts developed at this high level and automatically and reliably implement them directly into silicon. ... [read more]Video → December 2009 Joint FPGA-DSP grab, squeeze, and send effort sees video compression successAdding an FPGA to a team that includes a hybrid DSP device with a general-purpose CPU and DSP engine makes for a productive take on interfacing with numerous dissimilar video standards, compressing them to a common standard, and transmitting the result over an Ethernet link.Signal processing → December 2009 For floating-point processing, new choice arrives with the new decadeRob outlines several reasons developers addressing COTS military signal processing have reason to consider the Intel Core i7 micro-architecture.Software Defined Radio (SDR) → December 2009 Taming Software-Defined Radio: A graphical user interface for digital communication system prototypingDream Stream: Getting around what would have been an arduous learning curve by using Simulink for streaming access to the Universal Software Radio Peripheral 2 (USRP2)Market Research → December 2009 DC-HSPA+, MediaTek's rise, and training wheelsWill examines several reasons MediaTek looks to be more of a contender as 2010 Q1 begins.Software development → November 2009 Tackling Linux size, modularity, and GPL issuesKim outlines options for developers facing proprietary kernels and OSs that can substantially limit future architectural choices, driving up costs and reducing profits.DSP → November 2009 Performance, flexibility, and efficiency make the case for market-specific DSPs4G wireless communications processing and HD video/audio processing are among the challenges market-specific DSPs are gearing up to handle.Design considerations → November 2009 Unraveling debug and design verification snagsGrowing FPGA complexity need not equal a corresponding growth in costs or time to market.Market issues → November 2009 Q4 sees buys, mergers, and a niche player worth watchingInsights from Will on the cell phone chip market. lossless signal compression, and moreDSP → November 2009 Intel tries DSP again...using a "soft" approachSoftware is key to Intel's DSP plans.High Performance Computing (HPC) → November 2009 OpenVPX and high-speed interconnects usher in a new era of highly scalable DSP systemsHinderances to building large-scale DSP systems are falling by the wayside.VPX → October 2009 Why 3U VPX has an edge over CompactPCI for FPGA/DSP military applicationsMaking the case for a form factor that the mil-aero COTS community can rely on for high-speed fabric supportDSP → October 2009 Portrait of a power miser: Open-architecture DSP core teams with a number-crunching accelerator for audio appsEmbedded DSP-based solutions are stepping to the plate for a squeeze play. Digital audio processing solutions must fit into less space and consume less power than ever.White paper → October 2009 White Paper: Using the NAG Toolbox for MATLABÆThe Numerical Algorithms Group (NAG) developed the first mathematical software library, now the largest commercially available collection of mathematical and statistical algorithms. Here you will find demonstrated how to call some popular NAG routines and how to use MATLAB's plotting facilities to view the results.Design considerations → October 2009 White Paper: ISE Design Suite 11.1: Creating the First User-Specific FPGA Design EnvironmentsTaking on the designer productivity, time to market, and results quality trifectaMarket projections → August 2009 Everything you ever wanted to know about the cellular chip market - 2009This article details market forecasts for virtually all cell phone integrated circuits, including digital basebands, RF transceivers and PAs, application processors, graphics and other coprocessors, imagers, touch-screen controllers, and chips for all the new functions being added to cell phones. |
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